Current processes for making semiconductor devices use various plasma etch steps to form and pattern conductive layers, e.g., contacts and interconnects. In addition, plasma enhanced chemical vapor deposition (“PECVD”) steps may be used to form insulation layers that separate conductive layers. When such process steps are used to make flash memory devices (i.e., erasable programmable read only memories that may be erased electrically), charge may build up on the floating gates of the flash memory cells. That accumulated charge may produce flash memory cells that have uncontrollable i threshold voltages, which can yield a defective device.
This problem may be addressed by exposing the device to ultraviolet (“UV”) light, which neutralizes any electronic charge that has built up on the flash memory cell floating gate. Because such a step is most effective after all charge inducing process steps have been completed, the UV exposure step is performed near the end of the process, i.e., after the passivation layer, or layers, have been formed. When exposing a device to such a UV erase step, after the passivation layer has already been formed, that layer must be transparent to UV light. That constraint requires UV transparent materials, such as silicon oxynitride, to be used to make the passivation layer, and prevents UV opaque materials from being used to make that layer.
Certain UV opaque materials, e.g., silicon nitride and polyimide, are particularly desirable for making passivation layers. Accordingly, there is a need for a method for making a flash memory that neutralizes charge that may collect on the floating gates of flash memory cells, while permitting use of UV opaque materials to form the passivation layer.